1. Field of the Invention
Generally, the present disclosure relates to the manufacture of sophisticated semiconductor devices, and, more specifically, to a serial capacitor device with a middle electrode contact and methods of making such a capacitor device.
2. Description of the Related Art
In addition to the large number of transistor elements, a plurality of passive circuit elements, such as capacitors, are typically formed in integrated circuits that are used for a plurality of purposes, such as charge storage for storing information, for decoupling and the like. Decoupling in integrated circuits is an important aspect for reducing the switching noise of the fast switching transistors, since the decoupling capacitor may provide energy at a specific point of the circuitry, for instance at the vicinity of a fast switching transistor, and thus reduce voltage variations caused by the high transient currents which may otherwise unduly affect the logic state represented by the transistor.
Due to the decreased dimensions of circuit elements, not only the performance of the individual transistor elements may be increased, but also their packing density may be improved, thereby providing the potential for incorporating increased functionality into a given chip area. For this reason, highly complex circuits have been developed, which may include different types of circuits, such as analog circuits, digital circuits and the like, thereby providing entire systems on a single chip (SoC). Furthermore, in sophisticated micro-controller devices and other sophisticated devices, an increasing amount of storage capacity may be provided on chip with the CPU core, thereby also significantly enhancing the overall performance of modern computer devices. For example, in typical micro-controller designs, different types of storage devices may be incorporated so as to provide an acceptable compromise between die area consumption and information storage density versus operating speed. For example, static RAM memories may be formed on the basis of registers, thereby enabling an access time determined by the switching speed of the corresponding transistors in the registers. Typically, a plurality of transistors may be required to implement a corresponding static RAM cell, thereby significantly reducing the information storage density compared to, for instance, dynamic RAM (DRAM) memories including a storage capacitor in combination with a pass transistor. Thus, a higher information storage density may be achieved with DRAMs, although at a reduced access time compared to static RAMs, which may nevertheless render dynamic RAMs attractive in complex semiconductor devices.
Complex integrated circuit devices typically include a memory array, such as an embedded DRAM array, and other non-memory circuits, e.g., logic circuits (such as microprocessors), located outside of the memory array. One problem associated with manufacturing such complex devices is that some designers and manufacturing engineers tend to treat the regions outside the memory array and the memory array itself as completely separate items, each with their own unique design rules and process flows. As a result, in some cases, manufacturing such complex devices is not as cost-effective or efficient as it could be. For example, by independently focusing on one region to the exclusion of the other, additional manufacturing operations may be performed only in that one region, which tends to require additional manufacturing time, makes the resulting device more costly, and may lead to decreased product yields.
In recent years, as the integration density of semiconductor devices increases, the area occupied by individual devices continues to decrease. Specifically, a capacitor for storing data of a dynamic random access memory (DRAM) is required to have sufficient capacitance irrespective of the decrease in the area occupied by the capacitor. Accordingly, metal-insulator-metal (MIM) capacitors, in which a lower electrode and an upper electrode are formed of metal and separated by a layer of insulating material, have been used in many integrated circuit products. Additionally, MIM capacitors have been used extensively in semiconductor devices that perform analog-to-digital conversions and digital-to-analog conversions. Conversion between analog signals and digital signals requires that capacitors employed in such conversion processes be stable, i.e., the capacitance of the capacitor must be relatively stable over a range of applied voltages and temperatures. The capacitance of capacitors with polysilicon electrodes tends to be relatively unstable as the capacitance of such capacitor structures tends to vary with changes in temperature and applied voltage. Accordingly, capacitors with polysilicon electrodes are typically not used for such conversion applications.
In forming the upper and lower metal electrodes of a typical MIM capacitor, an etching process is typically performed to pattern a metal layer. However, as the integration density of semiconductor devices has increased over the recent years, it has become more difficult to etch such metal layers. In particular, copper, which has good electromigration resistance and a desirable low resistivity, is very difficult to etch. Accordingly, various methods for forming the upper and lower metal electrodes through a damascene process, a process which does not involve etching a metal layer, has been proposed. See, for example, U.S. Pat. No. 6,649,464. A copper damascene process generally comprises forming a trench for a copper structure in an insulation layer, forming a sufficient amount of copper to overfill the trench, and removing the excess copper from the substrate, thereby leaving the copper structure in the trench. However, the damascene process used in forming copper-based capacitors and conductive lines and vias is a very time-consuming, expensive, multiple step process where chances for creating undesirable defects always exists.
As noted above, it is not uncommon for a typical integrated circuit product to contain separate regions or areas where logic circuits and circuits requiring capacitors (memory circuits) are formed. As device dimensions have continued to shrink, the area or plot space allotted for forming conductive contact structures and metal lines and vias has continued to decrease as well. In some cases, in so-called “back-end-of-line” processing, metal hard mask layers are employed as etch masks instead of traditional photoresist masks so as to increase etch selectivity between the etch mask and the dielectric material and to enable the more accurate formation of openings for conductive structures, like conductive vias formed using a damascene process.
The present disclosure is directed to a high density serial capacitor device and methods of making such a capacitor device.